The present invention relates to a structure of a semiconductor device for flip chip bonding and a method for producing the semiconductor device.
Most of semiconductor devices have a multi-layer structure in which electrically insulating layers are disposed between the respective layers. Each of the electrically insulating layers has one or more opening portions. There exists wiring for connecting a terminal on a lower side of the electrically insulating layer to a terminal on an upper side of the electrically insulating layer through the opening portion in each insulating layer.
The following method is used for forming such an electrically insulating layer. That is, an opening portion is formed in an electrically insulating layer by the steps of: applying a photosensitive electrically insulating material onto a semiconductor device by a spin coating method; and performing exposure and development thereon. Metal wiring for connecting a terminal on a lower side of the electrically insulating layer to a terminal on an upper side of the electrically insulating layer is formed by the steps of: applying a second photosensitive material onto a layer on the upper side of the electrically insulating layer; performing exposure and development thereon to form a mask; and carrying out a process such as plating, sputtering, CVD, evaporation, etc. The photosensitive electrically insulating material used as a mask is removed after it becomes no longer necessary.
Wiring for connecting a terminal on the lower side of the electrically insulating layer to a terminal on the upper side of the electrically insulating layer can be formed by the aforementioned steps. FIG. 31 is a sectional view showing a part of the semiconductor device formed by the aforementioned steps. In FIG. 31, an aluminum pad 7 is a terminal on a lower side of an electrically insulating layer 12, and a bump pad 3 is a terminal on an upper side of the electrically insulating layer 12. The electrically insulating layer 12 which is formed on a wafer 9 having a semiconductor formed thereon has an opening portion formed over the aluminum pad 7. Metal wiring 11 is formed in an area from the aluminum pad 7 to the bump pad 3 above the electrically insulating layer 12. A bump 10 is formed on the bump pad 3. Incidentally, the formation of wiring in an area from the aluminum pad 7 to the bump pad 3 is termed xe2x80x9credistributionxe2x80x9d. In this illustration, the thickness of the electrically insulating layer 12 is selected to be approximately equal to the thickness of the metal wiring 11.
Flip chip bonding may be a model of method of mounting and bonding a semiconductor device, which is produced in the aforementioned steps, onto a circuit substrate such as a printed wiring board. FIG. 32 is a sectional view of a flip chip-bonded semiconductor device. The bump 10 provided on a terminal of the semiconductor device 13 is once melted and then solidified again on the circuit substrate 14 to thereby bond the semiconductor device 13 onto the circuit substrate 14. A gap between the semiconductor device 13 and the circuit substrate 14 is filled with a highly rigid resin. Incidentally, the resin is termed xe2x80x9cunderfill 15xe2x80x9d and effects reinforcement of the junction portion. JP-A-11-111768 discloses an example of flip chip bonding by use of the underfill.
The aforementioned conventional art, however, has the following problems.
Firstly, there is difficulty in the method of supplying the resin to the gap between the semiconductor device and the circuit substrate. That is, a method using a capillary phenomenon is employed as the method of supplying the resin to the gap that is not larger than 0.3 mm generally. The resin as a material for the underfill is, however, a liquid resin with a high viscosity. Hence, there are problems that a great deal of time is required for filling the gap with the resin and that air bubbles often remain in the resin, etc.
Secondly, there is difficulty in detachment of the semiconductor device. That is, in case that the semiconductor device is to be detached from the circuit substrate for the reason that the semiconductor device bonded onto the circuit substrate is defective, the cured underfill material still remains on the circuit substrate even after the detachment of the semiconductor device. Hence, there is a problem to recycle the circuit substrate.
To solve the first and second problems, it is preferable that the semiconductor device is bonded onto the circuit substrate without application of the underfill. However, if the underfill is not applied, there will arise another problem that the junction lifetime of the semiconductor device is shortened extremely. This is because the underfill is applied for the purpose of preventing the junction portion from being destroyed owing to strain caused by heat generation in the junction portion at use of a finished electric appliance.
Moreover, when a solder bump is formed on a semiconductor device, flip chip bonding may be performed without the underfill, but a soft error of a transistor portion may be induced by xcex1-ray accompanied with decay of impurities contained in the solder bump.
Therefore, an object of the present invention is to provide a semiconductor device for underfill-less flip chip bonding.
In order to achieve the foregoing object, the present invention is made as stated in appended claims. The foregoing object can be achieved by the formation of wiring on a desired electrically insulating layer (thick-film electrically insulating layer). For example, a low elastic material is used for an electrically insulating layer, whose thickness is not smaller than 35 microns on a semiconductor device to prevent the junction portion from being destroyed. Moreover, because of the presence of the low-elasticity electrically insulating layer, stress in the junction portion can be reduced greatly. Hence, the junction lifetime of the semiconductor device is improved greatly. Moreover, by selecting a predetermined value for the thickness of the electrically insulating layer, the stress induced on the wafer or the like can be relaxed and undesirable xcex1-ray can be intercept.
On the other hand, when an electrically insulating layer has a thickness of not smaller than 35 micrometers, difficulties appear to form the electrically insulating layer by the conventional wiring-forming process. That is, when a thick film is formed by a spin coating method, the resultant layer does not function well as an electrically insulating layer because the viscosity of the material for the film is high enough to contain air bubbles. Even if a novel thick-film-forming method is developed, it will be difficult to pattern opening portions or the like in the electrically insulating layer precisely, with exposure and development because light transmittance of the thus formed film is lowered when the film is 35 micrometers thick. Even if this problem is solved, it is difficult to form metal wiring on a side wall of the opening portion of the electrically insulating layer because the side wall stands at an angle of not smaller than 80 degrees or substantially perpendicular to the semiconductor device and has a height greatly larger than the thickness of the wiring. Further, even if metal wiring can be formed on the side wall, stress will be apt to be concentrated at a boundary between the side wall and the upper side of the electrically insulating layer because the metal wiring appears by bent shape on the boundary. Hence, a cracking easily progresses on this place so that the junction lifetime of the semiconductor device onto the circuit substrate is shortened.
Therefore, when, for example, an electrically insulating material containing fine particles is printed as a mask to form a thick-film electrically insulating layer accompanied with an opening portion with a gentle-slope side wall, wiring can be formed on the electrically insulating layer by the conventional process. Moreover, the wiring is hardly broken because the aforementioned bent portion of metal wiring where stress is concentrated does not exist along the wiring.
Moreover, the characteristic of the thick-film electrically insulating layer is varied in a direction of the thickness thereof. For example, the characteristic of the thick-film electrically insulating layer is varied so that the characteristic of the thick-film electrically insulating layer on the semiconductor device side comes close to the characteristic of the semiconductor while the characteristic of the thick-film electrically insulating layer on the electrode side comes close to the characteristic of the substrate on which these electrodes are mounted. Hence, concentration of stress on the wiring formed on the thick-film electrically insulating layer can be prevented to improve reliability. That is, the wiring can be prevented more greatly from being broken. Incidentally, in this specification, the thick-film electrically insulating layer is referred to as xe2x80x9cstress relaxation layerxe2x80x9d.